#ifndef __zf_h__
#define __zf_h__

#include "type.h"
#include "io.h"

template<class type>
struct ZfReg
{
};

template<>
struct ZfReg<U8>
{
	Relative<U8 ,0,Io<U8>  > addr;
	Relative<U8 ,1,Io<U8>  > data;
};

template<>
struct ZfReg<U16>
{
	Relative<U8 ,0,Io<U8>  > addr;
	Relative<U16,2,Io<U16> > data;
};

template<>
struct ZfReg<U32>
{
	Relative<U8 ,0,Io<U8>  > addr;
	Relative<U32,2,Io<U32> > data;
};

template<class type>
struct Zf
{
	type justForPointerArithmetic;

#if 0
	static ZfReg<type>* const zfReg=((ZfReg<type>*)0x218);

	inline void operator =(type v)
	{
		zfReg->addr=(U8)(U32)this;
		zfReg->data=v;
	}
	inline operator type()
	{
		zfReg->addr=(U8)(U32)this;
		return zfReg->data;
	}
#else
	inline void operator =(type v)
	{
		((ZfReg<type>*)0x218)->addr=(U8)(U32)this;
		((ZfReg<type>*)0x218)->data=v;
	}
	inline operator type()
	{
		((ZfReg<type>*)0x218)->addr=(U8)(U32)this;
		return ((ZfReg<type>*)0x218)->data;
	}
#endif
};

struct ZfRegs
{
/*
02 ZF-Logic Revision (LSB)--(02H)ZF-Logic Revision (MSB)--(03H)
*/
	Relative<U16,0x02,Zf<U16> > logicRev;


/*
04 PWM Prescaler Low Byte --(04H)PWM Prescaler High Byte -(05H)
06 PWM duty cycle --(06H)
08 PWM I/O Control --(08H)
0A PWM Read Output --(0AH)
0C Watchdog 1 Count Low Byte --(0CH)Watchdog 1 Count High Byte --(0DH)
0E Watchdog 2 Count Value --(0EH)Watchdog Reset Pulse Length --(0 H)
10 Watchdog Control Low --(10H)Watchdog Control High --(11H)
12 Watchdog Status --(12H)
Index 8-Bit Data at Index 8-Bit Data at Index +1
14 I/O Window 0 BaseLow (14H)I/O Window 0 BaseHigh (15H)
16 I/O Window 0 Control (16H)
18 I/O Window 1 BaseLow (18H)I/O Window 1 BaseHigh (19H)
1A I/O Window 1 Control (1AH)
1C I/O Window 2 BaseLow (1CH)I/O Window 2 BaseHigh (1DH)
1E I/O Window 2 Control (1EH)
20 I/O Window 3 BaseLow (20H)I/O Window 3 BaseHigh (21H)
22 I/O Window 3 Control (22EH)
24
PWM W/ D I/ O Window.ZFx86 Data Book 1.0 Rev C Page 401
5
Index 8-Bit Data at Index 8-Bit Data at Index +1
*/

/*
26 Memory Window 0 Base Bits 7-0 MW0 Base 15-12 MW0 Base11-8
28 Memory Window 0 Base Bits 23-16 Memory Window 0 Base Bits 31-24
2A Memory Window 0 Size Bits 7-0 MW0 Size 15-12 MW0 Size11-8
2C Memory Window 0 Size Bits 23-16 Memory Window 0 Size Bits 31-24
2E Memory Window 0 Page Bits 7-0 MW0 Page 15-12 MW0 Page11-8
30 Memory WIndow 0 Page Bits 23-16 Memory Window 0 Page Bits 31-24
32 Memory Window 1 Base Bits 7-0 MW1 Base 15-12 MW1 Base11-8
34 Memory Window 1 Base Bits 23-16 Memory Window 1 Base Bits 31-24
36 Memory Window 1 Size Bits 7-0 MW1 Size 15-12 MW1 Size11-8
38 Memory Window 1 Size Bits 23-16 Memory Window 1 Size Bits 31-24
3A Memory Window 1 Page Bits 7-0 MW1 Page 15-12 MW1 Page11-8
3C Memory Window 1 Page Bits 23-16 Memory Window 1 Page Bits 31-24
3E Memory Window 2 Base Bits 7-0 MW2 Base 15-12 MW2 Base11-8
40 Memory Window 2 Base Bits 23-16 Memory Window 2 Base Bits 31-24
42 Memory Window 2 Size Bits 7-0 MW2 Size 15-12 MW2 Size11-8
44 Memory Window 2 Size Bits 23-16 Memory Window 2 Size Bits 31-24
46 Memory Window 2 Page Bits 7-0 MW2 Page 15-12 MW2 Page11-8
48 Memory Window 2 Page Bits 23-16 Memory Window 2 Page Bits 31-24
4A Memory Window 3 Base Bits 7-0 MW3 Base 15-12 MW3 Base11-8
4C Memory Window 3 Base Bits 23-16 Memory Window 3 Base Bits 31-24
4E Memory Window 3 Size Bits 7-0 MW3 Size 15-12 MW3 Size11-8
50 Memory Window 3 Size Bits 23-16 Memory Window 3 Size Bits 31-24
52 Memory Window 3 Page Bits 7-0 MW3 Page 15-12 MW3 Page11-8
54 Memory Window 3 Page Bits 23-16 Memory Window 3 Page Bits 31-24
*/
	struct MemoryWindow
	{
#if 0
		struct ByteAccess
		{
			RelativeRef<Zf<U8> ,0x00> base;
			inline operator=(U32 v)
			{
				base[0]=v&0xff;
				v>>=8;
				base[1]=v&0xff;
				v>>=8;
				base[2]=v&0xff;
				v>>=8;
				base[3]=v;
			}
			inline operator U32()
			{
				U32 v;
				v=base[3];
				v<<=8;
				v|=base[2];
				v<<=8;
				v|=base[1];
				v<<=8;
				v|=base[0];
				return v;
			}
		};
		Relative<U32,0x00,ByteAccess> base;
		Relative<U32,0x04,ByteAccess> size;
		Relative<U32,0x08,ByteAccess> page;
#else
		Relative<U32,0x00,Zf<U32> > base;
		Relative<U32,0x04,Zf<U32> > size;
		Relative<U32,0x08,Zf<U32> > page;
#endif
		U8 sizeIs[0x0c];
	};
	RelativeRef<MemoryWindow,0x26> memoryWindows;
/*
Table 5 2 ZF-Logic Complete Index (cont )
Memory Window.5
Index 8-Bit Data at Index 8-Bit Data at Index +1
*/
/*
56 BURBaseLow(57H)
58 BUR BaseHigh (58H)
5A Memory Control Low (5AH)Memory Control High (5BH)
*/
	Relative<U8,0x5a,Zf<U8> > MemoryControlLow;
	Relative<U8,0x5b,Zf<U8> > MemoryControlHigh;
/*
5C
5E Z-tag Data WriteRegister (5EH)
60 Z-tag Data Read Register (60H)
62 Bootstrap Bits 7-0 (62H)Bootstrap Bits 15-8 (63H)
64 Bootstrap Bits 23-16 (64H)
66 I/O+Memory Window Map Events 66H
*/

/*
68 Scratch Register 0 Low (68H)Scratch Register 0 High (69H)
6A Scratch Register 1 Low (6AH)Scratch Register 1 High (6BH)
6C Scratch Register 2 Low (6CH)Scratch Register 2 High (6CH)
6E Scratch Register 3 Low (6EH)Scratch Register 3 High (6FH)
70 Scratch Register 4 Low (70H)Scratch Register 4 High (70H)
72 Scratch Register 5 Low (72H)Scratch Register 5 High (73H)
74 Scratch Register 6 Low (74H)Scratch Register 6 High (75H)
76 Scratch Register 7 Low (76H)Scratch Register 7 High (77H)
78 Scratch Register 8 Low (78H)Scratch Register 8 High (79H)
7A Scratch Register 9 Low (7AH)Scratch Register 9 High (7BH)
*/
	RelativeRef<Zf<U16> ,0x68> scratchRegs;
/*
7C Z-tag control register (7CH)Z-tag Sequencer Divisor Register (7DH)
7E Z-tag Sequencer Waveform (7EH)Z-tag Sequencer Strobe Points (7FH)
80 Z-tag Sequencer Data (80H)Z-tag Sequencer Status (81H)
*/
	struct Ztag
	{
		Relative<U8,0x00,Zf<U8> > control;
		Relative<U8,0x01,Zf<U8> > sequencerDivisor;
		Relative<U8,0x02,Zf<U8> > sequencerWaveform;
		Relative<U8,0x03,Zf<U8> > sequencerStrobePoints;
		Relative<U8,0x04,Zf<U8> > sequencerData;
		Relative<U8,0x05,Zf<U8> > sequencerStatus;
	};
	RelativeRef<Ztag,0x7c> ztag;
/*
Table 5 2 ZF-Logic Complete Index (cont )
*/
};

#define zfRegs ((ZfRegs*)0)

struct MemoryWindow
{
	U32 base;
	U32 size;
	U32 page;
};

#define MemoryWindowBase0 0x26
#define MemoryWindowBase1 0x32
#define MemoryWindowBase2 0x3e
#define MemoryWindowBase3 0x4a

inline void SetMemoryWindow(U32 base,MemoryWindow *mw)
{
	U8 *pt=(U8*)mw;
	Zf<U8>* zfr=(Zf<U8>*)base;
	for(unsigned i=0;i<sizeof(MemoryWindow);i++)
	{
		*zfr=*pt;
		zfr++;
		pt++;
		base++;
	}
}

#endif /* __zf_h__ */